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| LH530800A-Y FEATURES * 131,072 words x 8 bit organization * Access times: 500 ns (MAX.) at 2.6 V VCC < 4.5 V 150 ns (MAX.) at 4.5 V VCC 5.5 V * Low-power consumption: Operating: 193 mW (MAX.) Standby: 550 W (MAX.) * Static operation * Three-state outputs * Mask-programmable control pin: Pin 24 = OE/OE * Wide range power supply: 2.6 V to 5.5 V * Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP DESCRIPTION The LH530800A-Y is a 1M-bit mask-programmable ROM organized as 131,072 x 8 bits. It is fabricated using silicon-gate CMOS process technology. CMOS 1M (128K x 8) 3 V-Drive MROM PIN CONNECTIONS 32-PIN DIP 32-PIN SOP NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc NC NC A14 A13 A8 A9 A11 OE/OE A10 CE D7 D6 D5 D4 D3 TOP VIEW 530800A-Y-1 Figure 1. Pin Connections for DIP and SOP Packages 1 LH530800A-Y CMOS 1M Mask-Programmable ROM A16 1 A15 2 A14 28 ADDRESS DECODER A10 22 A9 25 A8 26 A7 4 A6 5 A5 6 A4 A3 A2 A1 7 8 9 10 ADDRESS BUFFER A13 27 A12 3 A11 24 MEMORY MATRIX (131,072 x 8) COLUMN SELECTOR A0 11 SENSE AMPLIFIER CE 21 CE BUFFER TIMING GENERATOR OUTPUT BUFFER OE/OE 23 OE BUFFER 30 31 VCC 15 GND 12 D0 13 D1 14 D2 16 D3 17 D4 18 D5 19 D6 20 D7 530800A-Y-2 Figure 2. LH530800A-Y Block Diagram PIN DESCRIPTION SIGNAL PIN NAME NOTE SIGNAL PIN NAME NOTE A0 - A16 D0 - D7 CE OE/OE Address input Data Output Chip enable input Output enable input 1 VCC GND NC Power supply Ground Non connection NOTE: 1. Active levels of OE/OE are mask-programmable. TRUTH TABLE CE OE/OE D0 - D7 SUPPLY CURRENT NOTE H L L NOTE: 1. X = H or L X L/H H/L High-Z High-Z DOUT Standby (ISB) Operating (ICC) Operating (ICC) 1 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT Supply voltage VCC -0.3 to +7.0 V 2 CMOS 1M Mask-Programmable ROM LH530800A-Y Input voltage Output voltage Operating temperature Storage temperature VIN VOUT Topr Tstg -0.3 to VCC +0.3 -0.3 to VCC +0.3 0 to +70 -65 to +150 V V C C RECOMMENDED OPERATING CONDITIONS (TA = 0 to +70C) PARAMETER SYMBOL MIN. TYP. MAX. UNIT Supply voltage VCC 2.6 5.5 V DC CHARACTERISTICS (VCC = 2.6 V to 5.5 V, TA = 0 to +70C) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT NOTE Input `Low' voltage Input `High' voltage Output `Low' voltage Output `High' voltage Input leakage current Output leakage current Operating current VIL VIH VOL VOH | ILI | | ILO | ICC1 ICC2 ICC3 ISB1 ISB2 CIN COUT IOL = 400 A IOH = -100 A VIN = 0 V to V CC VOUT = 0 V to V CC tRC = 150 ns tRC = 500 ns tRC = 500 ns CE = VIH CE = VCC - 0.2 V f = 1 MHz TA = 25C -0.3 0.8 x VCC 0.8 x VCC 0.4 VCC + 0.3 0.4 10 10 35 18 12 2 100 10 10 V V V V A A mA mA mA mA A pF pF 1 2 3 4 Standby current Input capacitance Output capacitance NOTES: 1. CE/OE = VIH, OE = VIL 2. 4.5 V VCC 5.5 V, outputs open 3. 3.4 V < VCC < 4.5 V, outputs open 4. 2.6 V VCC 3.4 V, outputs open AC CHARACTERISTICS (TA = 0 to +70C) PARAMETER SYMBOL 2.6 V VCC < 4.5 V MIN. MAX. 4.5 V VCC 5.5 V MIN. MAX. UNIT NOTE Read cycle time Address access time Chip enable access time Output enable delay time Output hold time CE to output in High-Z OE to output in High-Z tRC tAA tACE tOE tOH tCHZ tOHZ 500 500 500 200 10 150 150 150 150 150 80 10 80 80 ns ns ns ns ns ns ns 1 NOTE: 1. This is the time required for the output to become high-impedance. 3 LH530800A-Y CMOS 1M Mask-Programmable ROM AC TEST CONDITIONS PARAMETER RATING Input voltage amplitude Input rise/fall time Input/output reference level Output load condition 0.4 V to (0.8 x VCC) V 10 ns 1.5 V 1TTL + 100 pF CAUTION To stabilize the power supply, it is recommended that a high-frequency bypass capacitor be connected between the V CC and the GND pin. tRC A0 - A16 tAA (NOTE) CE tACE (NOTE) OE OE tOE (NOTE) tOH tOHZ tCHZ D 0 - D7 DATA VALID NOTE: Data becomes valid when the last intervals, tAA, tACE, or tOE, have concluded. 530800A-Y-4 Figure 3. Timing Diagram 4 CMOS 1M Mask-Programmable ROM LH530800A-Y PACKAGE DIAGRAMS 32DIP (DIP032-P-0600) 32 17 DETAIL 13.45 [0.530] 12.95 [0.510] 1 41.30 [1.626] 40.70 [1.602] 16 0.30 [0.012] 0.20 [0.008] 0 TO 15 4.50 [0.177] 4.00 [0.157] 5.20 [0.205] 5.00 [0.197] 3.50 [0.138] 3.00 [0.118] 2.54 [0.100] TYP. 0.51 [0.020] MIN. 0.60 [0.024] 0.40 [0.016] MAXIMUM LIMIT MINIMUM LIMIT 15.24 [0.600] TYP. DIMENSIONS IN MM [INCHES] 32DIP 32-pin, 600-mil DIP 32SOP (SOP032-P-0525) 1.27 [0.050] TYP. 1.40 [0.055] 17 0.50 [0.020] 0.30 [0.012] 32 11.50 [0.453] 11.10 [0.437] 14.50 [0.571] 13.70 [0.539] 12.50 [0.492] 1 20.80 [0.819] 20.40 [0.803] 16 1.40 [0.055] 0.20 [0.008] 0.10 [0.004] 0.15 [0.006] 1.275 [0.050] 2.90 [0.114] 2.50 [0.098] 0.20 [0.008] 0.00 [0.000] 1.275 [0.050] MAXIMUM LIMIT MINIMUM LIMIT DIMENSIONS IN MM [INCHES] 32SOP 32-pin, 525-mil SOP 5 LH530800A-Y CMOS 1M Mask-Programmable ROM ORDERING INFORMATION LH530800A Device Type X Package -Y Low-Voltage Operation D 32-pin, 600-mil DIP (DIP032-P-0600) N 32-pin, 525-mil SOP (SOP032-P-0525) CMOS 1M (128K x 8) Mask-Programmable ROM Example: LH530800AD-Y (CMOS 1M (128K x 8) Mask-Programmable ROM, Low-Voltage Operation, 32-pin, 600-mil DIP) 530800A-Y-3 6 |
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